AMD has patented a multi-core hybrid computing architecture somewhat similar to Arm's big.LITTLE approach and Intel's Lakefield chip. The patent suggests that the company is definitely interested in pursuing processors that mix the best of both high-power and low-power computing at once.

We now live in an era where it is perfectly acceptable to pack 10, 12, or 16 cores into a processor and call it a day, with AMD and Intel vying for the throne of multi-core performance. However, these chips are the antithesis of efficiency, and some workloads require them to deliver high single-core performance without increasing power consumption.

The hybrid chip is here to stay. This is the approach favored under the big.LITTLE banner, or at least the most widely used. It is a heterogeneous processing architecture proposed by Arm, in which the "big" processors are designed to perform compute-intensive processing, while the "little" processors perform other processing while maximizing power efficiency.

Intel has also followed suit with its Lakefield chip, which integrates both a big Core core and a small Atom core, and is expected to do so in future broader Alder Lake desktop architectures.

A new patent dug up by user Underfox3 via freepatentsonline [PDF alert] on Twitter suggests that AMD is at least considering its own heterogeneous approach. The patent was first filed in 2017, making it relatively new to us; it has been an R&D consideration at AMD for perhaps some time.

The patent, titled "Implementation of Instruction Subset for Low Power Operation," is relatively basic. The patent outlines how two processors (one "high-function" and one "low-function") communicate and divide tasks for efficient operation.

The patent outlines three possible designs, each with a different cache configuration and shared registers. However, all possible outcomes share a similar goal: that execution of a given thread is handed over to the high-performance chip when the low-power chip is overused.

The patent specifically outlines the growing need for such chips in mobile devices to save battery life, so it is not expected to reach the desktop processor market any time soon.

However, there are rumors that Intel may be considering a hybrid computing solution for a future desktop chip. The chip would use eight Golden Cove cores, an evolution of Tiger Lake's Willow Cove cores, and eight lower-performance Gracemont cores. It is hard to imagine what use such a chip would serve on a desktop, where battery savings are not a concern, but if true, one can assume that Intel engineers have faith in the concept.

However, it is unlikely that PC power consumption will continue to increase exponentially. Although process node development is still (in part) going well there, we will reach a point where smarter and more heterogeneous chips will be needed to meet user requirements and do so without consuming exorbitant power from the main power supply.

And speaking of patents, Underfox was also busy digging through a mountain of AMD patents, including everything from spring-loaded heatspreaders to neural network-busting circuitry. It's impossible to predict which ones will make it into the processors that ship, but if you're interested in that sort of thing, they make for a good future map.